TY - GEN
T1 - Yield-driven redundant power bump assignment for power network robustness
AU - Lee, Yu-Min
AU - Lee, Chi Han
AU - Zhu, Yan Cheng
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/2/16
Y1 - 2017/2/16
N2 - During package manufacturing process, open defects of power bumps may cause insufficient power supply and degrade the power network yield. This work presents a redundant power bump insertion method to ensure power integrity by considering the power bump yields. The proposed method can efficiently assign redundant bumps by accurately estimating the location of worst load yield and minimizing the amounts of redundant bumps to enhance the power network yield.
AB - During package manufacturing process, open defects of power bumps may cause insufficient power supply and degrade the power network yield. This work presents a redundant power bump insertion method to ensure power integrity by considering the power bump yields. The proposed method can efficiently assign redundant bumps by accurately estimating the location of worst load yield and minimizing the amounts of redundant bumps to enhance the power network yield.
UR - http://www.scopus.com/inward/record.url?scp=85015346898&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2017.7858331
DO - 10.1109/ASPDAC.2017.7858331
M3 - Conference contribution
AN - SCOPUS:85015346898
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 269
EP - 274
BT - 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
Y2 - 16 January 2017 through 19 January 2017
ER -