Well-behaved 4H-SiC PMOSFET with LOCal oxidation of SiC (LOCOSiC) isolation structure and compromised gate oxide for Sub-10V SiC CMOS application

Chia Lung Hung*, Bing Yue Tsui

*此作品的通信作者

研究成果: Review article同行評審

10 引文 斯高帕斯(Scopus)

摘要

SiC devices are suitable for high temperature applications due to its’ wide energy bandgap and high thermal conductivity. Some SiC CMOSFET ICs have been reported recently. However, less literature address the characteristics of SiC PMOSFET. In this work, we fabricated PMOSFET with Local Oxidation of SiC (LOCOSiC) isolation structure and different gate oxidation processes targeting sub-10V operation. Well behaved PMOSFET with suitable threshold voltage (−5.58 V), low subthreshold swing (200 mV/decade), acceptable hole mobility (3 cm2/V-sec), and low off-state current (<1 × 10−12 A/μm at −10 V) is achieved. Temperature dependence of device characteristics are investigated. These results make the implementation of high-performance CMOS a great progress.

原文English
文章編號107774
期刊Solid-State Electronics
166
DOIs
出版狀態Published - 4月 2020

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