TY - JOUR
T1 - VPN Gateways over network processors
T2 - 11th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2005
AU - Lin, Yi Neng
AU - Lin, Chiuan Hung
AU - Lin, Ying-Dar
AU - Lai, Yuan Chen
PY - 2005/9/26
Y1 - 2005/9/26
N2 - Networking applications, such as VPN and content filtering, demand extra computing power in order to meet the throughput requirement nowadays. In addition to pure ASIC solutions, network processor architecture is emerging as an alternative to scale up data-plane processing while retaining design flexibility. This article, rather than proposing new algorithms, illustrates the experience in developing IPSec-based VPN gateways over network processors, and investigates the performance issues. The external benchmarks reveal that the system can reach 45Mbps for IPSec using 3DES algorithm, which improves by 350% compared to single XScale core processor and parallels the throughput of a PIII IGHz processor. Through the internal benchmarks, we analyze the turnaround times of the main functional blocks, and identify the core processor as the performance bottleneck for both packet forwarding and IPSec processing.
AB - Networking applications, such as VPN and content filtering, demand extra computing power in order to meet the throughput requirement nowadays. In addition to pure ASIC solutions, network processor architecture is emerging as an alternative to scale up data-plane processing while retaining design flexibility. This article, rather than proposing new algorithms, illustrates the experience in developing IPSec-based VPN gateways over network processors, and investigates the performance issues. The external benchmarks reveal that the system can reach 45Mbps for IPSec using 3DES algorithm, which improves by 350% compared to single XScale core processor and parallels the throughput of a PIII IGHz processor. Through the internal benchmarks, we analyze the turnaround times of the main functional blocks, and identify the core processor as the performance bottleneck for both packet forwarding and IPSec processing.
UR - http://www.scopus.com/inward/record.url?scp=24944552197&partnerID=8YFLogxK
U2 - 10.1109/RTAS.2005.58
DO - 10.1109/RTAS.2005.58
M3 - Conference article
AN - SCOPUS:24944552197
SN - 1545-3421
SP - 480
EP - 486
JO - Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS
JF - Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS
Y2 - 7 March 2005 through 10 March 2005
ER -