VLSI processor design of real-time data compression for high-resolution imaging radar

Wai-Chi  Fang*

*此作品的通信作者

研究成果: Conference article同行評審

2 引文 斯高帕斯(Scopus)

摘要

For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

原文English
頁(從 - 到)441-444
頁數4
期刊Proceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs
出版狀態Published - 1994
事件Proceedings of the 7th IEEE International ASIC Conference and Exhibit - Rochester, NY, USA
持續時間: 19 9月 199423 9月 1994

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