VLSI Implementation of an Annealing Accelerator for Solving Combinatorial Optimization Problems

Keyphrases

• Annealing 100%
• Area Consumption 33%
• Combinatorial Optimization Problem 100%
• Complementary Metal Oxide Semiconductor 33%
• Complementary Metal-oxide-semiconductor Technology 66%
• Economic Constraints 33%
• Excellent Performance 33%
• Formulation Optimization 33%
• Fully Connected 33%
• Hardware Architecture 33%
• Ising Model 66%
• Manufacturing Firms 33%
• Multiple Mappings 33%
• Multiple Solutions 33%
• Power Consumption 33%
• Pseudorandom number Generator 33%
• Quadratic Unconstrained Binary Optimization 33%
• Quantum Annealing 33%
• Quantum Computing 33%
• Quantum Computing Algorithms 33%
• Semiconductor Annealing 33%
• Semiconductor Manufacturing 33%
• Taiwan 33%
• Temperature Constraint 33%
• Traditional Computing 33%
• VLSI Implementation 100%

Engineering

• Application Field 33%
• Complementary Metal-Oxide-Semiconductor 100%
• Electric Power Utilization 33%
• Experimental Result 33%
• Ising Model 66%
• Manufacturing Company 33%
• Optimisation Problem 100%
• Quantum Computation 66%
• Random Number 33%
• Semiconductor Manufacturing 33%

Computer Science

• Circuit Technology 33%
• Combinatorial Optimization Problem 100%
• Complementary Metal Oxide Semiconductor 100%
• Experimental Result 33%
• Hardware Architecture 33%
• Optimization Formulation 33%
• Power Consumption 33%
• Pseudo-Random Number Generator 33%
• Quantum Computing 66%