V-band flip-chip assembled gain block using In0:6Ga0:4As metamorphic high-electron-mobility transistor technology

Che Yang Chiang; Heng-Tung Hsu; Chin Te Wang; Chien I. Kuo; Heng Shou Hsu; Edward Yi Chang

doi:10.1143/APEX.4.104105

V-band flip-chip assembled gain block using In0:6Ga0:4As metamorphic high-electron-mobility transistor technology

Che Yang Chiang^*, Heng-Tung Hsu, Chin Te Wang, Chien I. Kuo, Heng Shou Hsu, Edward Yi Chang

^*此作品的通信作者

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

摘要

This study fabricated a 150nm In_0.6Ga_0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with I_DS = 350mA/mm and a transconductance of 600mS/mm at V_DS = 0:5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption.

原文	English
文章編號	104105
期刊	Applied Physics Express
卷	4
發行號	10
DOIs	https://doi.org/10.1143/APEX.4.104105
出版狀態	Published - 1 10月 2011

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title = "V-band flip-chip assembled gain block using In0:6Ga0:4As metamorphic high-electron-mobility transistor technology",

abstract = "This study fabricated a 150nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with IDS = 350mA/mm and a transconductance of 600mS/mm at VDS = 0:5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption.",

author = "Chiang, {Che Yang} and Heng-Tung Hsu and Wang, {Chin Te} and Kuo, {Chien I.} and Hsu, {Heng Shou} and Chang, {Edward Yi}",

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doi = "10.1143/APEX.4.104105",

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T1 - V-band flip-chip assembled gain block using In0:6Ga0:4As metamorphic high-electron-mobility transistor technology

AU - Chiang, Che Yang

AU - Hsu, Heng-Tung

AU - Wang, Chin Te

AU - Kuo, Chien I.

AU - Hsu, Heng Shou

AU - Chang, Edward Yi

PY - 2011/10/1

Y1 - 2011/10/1

N2 - This study fabricated a 150nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with IDS = 350mA/mm and a transconductance of 600mS/mm at VDS = 0:5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption.

AB - This study fabricated a 150nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with IDS = 350mA/mm and a transconductance of 600mS/mm at VDS = 0:5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption.

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DO - 10.1143/APEX.4.104105

M3 - Article

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V-band flip-chip assembled gain block using In0:6Ga0:4As metamorphic high-electron-mobility transistor technology

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