Using a neural network-based approach to predict the wafer yield in integrated circuit manufacturing

Lee-Ing Tong*, Wei-I Lee, Ch T. Su

*此作品的通信作者

研究成果: Article同行評審

10 引文 斯高帕斯(Scopus)

摘要

In integrated circuit (IC) manufacturing, defects on wafer tend to cluster. As the wafer size increases, the clustering phenomenon of the defects becomes increasingly apparent. When the conventional Poisson yield model is used, the clustered defects frequently cause erroneous results. In this study, we propose a neural network-based approach to predict the wafer yield in IC manufacturing. The proposed approach can reduce the phenomenon of the erroneous predictions caused by the clustered defects. A case study is also presented, demonstrating the effectiveness of the proposed approach. In addition, the proposed approach can be written as a computer software to accurately predict the wafer yield in IC manufacturing.

原文English
頁(從 - 到)288-294
頁數7
期刊IEEE transactions on components, packaging and manufacturing technology. Part C. Manufacturing
20
發行號4
DOIs
出版狀態Published - 1 10月 1997

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