Unified array architecture for discrete cosine transform, sine transform and their inverses

Jiun-In  Guo; Chingson Chen; Chein Wei Jen

doi:10.1049/el:19951254

Unified array architecture for discrete cosine transform, sine transform and their inverses

Jiun-In Guo, Chingson Chen, Chein Wei Jen

電子研究所

研究成果: Article › 同行評審

12 引文斯高帕斯（Scopus）

摘要

A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.

原文	English
頁（從 - 到）	1811-1812
頁數	2
期刊	Electronics Letters
卷	31
發行號	21
DOIs	https://doi.org/10.1049/el:19951254
出版狀態	Published - 12 10月 1995

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10.1049/el:19951254

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abstract = "A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.",

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N2 - A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.

AB - A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.

KW - Discrete cosine transforms

KW - Sine transforms

KW - Systolic arrays

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Unified array architecture for discrete cosine transform, sine transform and their inverses

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