A lightly doped drain (LDD) MOS device model for circuit simulation in SPICE is described. UNIMOS includes a consistent set of DC (I-V), AC (C-V), and hot electron degradation effect models. For the I-V and C-V models, results for achieving accurate and computationally efficient models of both conventional and LDD MOSFETs with submicron channel length are described. Strategies for implementing the hot electron effect in the circuit simulator for predicting the lifetime of a device or circuit in a VLSI environment are demonstrated.
|出版狀態||Published - 9月 1990|
|事件||Proceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit - Rochester, NY, USA|
持續時間: 17 9月 1990 → 21 9月 1990
|Conference||Proceedings of the 3rd Annual IEEE ASIC Seminar and Exhibit|
|城市||Rochester, NY, USA|
|期間||17/09/90 → 21/09/90|