Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology

Sourav De; Darsen D. Lu; Hoang Hiep Le; Soumen Mazumder; Yao Jen Lee; Wei Chih Tseng; Bo Han Qiu; Md Aftab Baig; Po Jung Sung; Chung Jun Su; Chien Ting Wu; Wen Fa Wu; Wen Kuan Yeh; Yeong Her Wang

Ultra-Low Power Robust 3bit/cell Hf_0.5Zr_0.5O₂ Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology

Sourav De^*, Darsen D. Lu, Hoang Hiep Le, Soumen Mazumder, Yao Jen Lee, Wei Chih Tseng, Bo Han Qiu, Md Aftab Baig, Po Jung Sung, Chung Jun Su, Chien Ting Wu, Wen Fa Wu, Wen Kuan Yeh, Yeong Her Wang

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研究成果: Conference contribution › 同行評審

46 引文斯高帕斯（Scopus）

摘要

Scaled ferroelectric FinFET devices were fabricated with post fin formation surface engineering (SE) to remove the line-edge roughness (LER) from the silicon surface by dry etching. This facilitated 3bit/cell operations in 10 nm Hf_0.5Zr_0.5O₂ based ferroelectric FinFETs along with on-state current (I_ON) to off-state current (I_OFF) ratio of 10⁶, extrapolated 10-year retention and endurance above 10¹¹ cycles. Further, we have evaluated its performance in all ferroelectric neural network, where ferroelectric FinFETs are used as synaptic devices or neurons for weight storage. Synaptic core built with optimized devices achieve software-comparable 97.91% inference accuracy on MNIST data and multi-layer perceptron network.

原文	English
主出版物標題	2021 Symposium on VLSI Technology, VLSI Technology 2021
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9784863487802
出版狀態	Published - 2021
事件	41st Symposium on VLSI Technology, VLSI Technology 2021 - Virtual, Online, 日本持續時間: 13 6月 2021 → 19 6月 2021

出版系列

名字	Digest of Technical Papers - Symposium on VLSI Technology
卷	2021-June
ISSN（列印）	0743-1562

Conference

Conference	41st Symposium on VLSI Technology, VLSI Technology 2021
國家/地區	日本
城市	Virtual, Online
期間	13/06/21 → 19/06/21

其它文件與鏈接

Link to publication in Scopus

引用此

De, S., Lu, D. D., Le, H. H., Mazumder, S., Lee, Y. J., Tseng, W. C., Qiu, B. H., Baig, M. A., Sung, P. J., Su, C. J., Wu, C. T., Wu, W. F., Yeh, W. K., & Wang, Y. H. (2021). Ultra-Low Power Robust 3bit/cell Hf_0.5Zr_0.5O₂ Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology. 於 2021 Symposium on VLSI Technology, VLSI Technology 2021 (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2021-June). Institute of Electrical and Electronics Engineers Inc..

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title = "Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology",

abstract = "Scaled ferroelectric FinFET devices were fabricated with post fin formation surface engineering (SE) to remove the line-edge roughness (LER) from the silicon surface by dry etching. This facilitated 3bit/cell operations in 10 nm Hf0.5Zr0.5O2 based ferroelectric FinFETs along with on-state current (ION) to off-state current (IOFF) ratio of 106, extrapolated 10-year retention and endurance above 1011 cycles. Further, we have evaluated its performance in all ferroelectric neural network, where ferroelectric FinFETs are used as synaptic devices or neurons for weight storage. Synaptic core built with optimized devices achieve software-comparable 97.91% inference accuracy on MNIST data and multi-layer perceptron network.",

author = "Sourav De and Lu, {Darsen D.} and Le, {Hoang Hiep} and Soumen Mazumder and Lee, {Yao Jen} and Tseng, {Wei Chih} and Qiu, {Bo Han} and Baig, {Md Aftab} and Sung, {Po Jung} and Su, {Chung Jun} and Wu, {Chien Ting} and Wu, {Wen Fa} and Yeh, {Wen Kuan} and Wang, {Yeong Her}",

note = "Publisher Copyright: {\textcopyright} 2021 JSAP; 41st Symposium on VLSI Technology, VLSI Technology 2021 ; Conference date: 13-06-2021 Through 19-06-2021",

year = "2021",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2021 Symposium on VLSI Technology, VLSI Technology 2021",

address = "美國",

}

De, S, Lu, DD, Le, HH, Mazumder, S, Lee, YJ, Tseng, WC, Qiu, BH, Baig, MA, Sung, PJ, Su, CJ, Wu, CT, Wu, WF, Yeh, WK & Wang, YH 2021, Ultra-Low Power Robust 3bit/cell Hf_0.5Zr_0.5O₂ Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology. 於 2021 Symposium on VLSI Technology, VLSI Technology 2021. Digest of Technical Papers - Symposium on VLSI Technology, 卷 2021-June, Institute of Electrical and Electronics Engineers Inc., 41st Symposium on VLSI Technology, VLSI Technology 2021, Virtual, Online, 日本, 13/06/21.

Ultra-Low Power Robust 3bit/cell Hf_0.5Zr_0.5O₂ Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology. / De, Sourav; Lu, Darsen D.; Le, Hoang Hiep 等.
2021 Symposium on VLSI Technology, VLSI Technology 2021. Institute of Electrical and Electronics Engineers Inc., 2021. (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2021-June).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology

AU - De, Sourav

AU - Lu, Darsen D.

AU - Le, Hoang Hiep

AU - Mazumder, Soumen

AU - Lee, Yao Jen

AU - Tseng, Wei Chih

AU - Qiu, Bo Han

AU - Baig, Md Aftab

AU - Sung, Po Jung

AU - Su, Chung Jun

AU - Wu, Chien Ting

AU - Wu, Wen Fa

AU - Yeh, Wen Kuan

AU - Wang, Yeong Her

PY - 2021

Y1 - 2021

N2 - Scaled ferroelectric FinFET devices were fabricated with post fin formation surface engineering (SE) to remove the line-edge roughness (LER) from the silicon surface by dry etching. This facilitated 3bit/cell operations in 10 nm Hf0.5Zr0.5O2 based ferroelectric FinFETs along with on-state current (ION) to off-state current (IOFF) ratio of 106, extrapolated 10-year retention and endurance above 1011 cycles. Further, we have evaluated its performance in all ferroelectric neural network, where ferroelectric FinFETs are used as synaptic devices or neurons for weight storage. Synaptic core built with optimized devices achieve software-comparable 97.91% inference accuracy on MNIST data and multi-layer perceptron network.

AB - Scaled ferroelectric FinFET devices were fabricated with post fin formation surface engineering (SE) to remove the line-edge roughness (LER) from the silicon surface by dry etching. This facilitated 3bit/cell operations in 10 nm Hf0.5Zr0.5O2 based ferroelectric FinFETs along with on-state current (ION) to off-state current (IOFF) ratio of 106, extrapolated 10-year retention and endurance above 1011 cycles. Further, we have evaluated its performance in all ferroelectric neural network, where ferroelectric FinFETs are used as synaptic devices or neurons for weight storage. Synaptic core built with optimized devices achieve software-comparable 97.91% inference accuracy on MNIST data and multi-layer perceptron network.

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M3 - Conference contribution

AN - SCOPUS:85111649053

T3 - Digest of Technical Papers - Symposium on VLSI Technology

BT - 2021 Symposium on VLSI Technology, VLSI Technology 2021

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 41st Symposium on VLSI Technology, VLSI Technology 2021

Y2 - 13 June 2021 through 19 June 2021

ER -

Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology

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出版系列

Conference

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Ultra-Low Power Robust 3bit/cell Hf_0.5Zr_0.5O₂ Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology