U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data Memory

  • Ming Hung Wu*
  • , Ming Chun Hong
  • , Ching Shih
  • , Yao Jen Chang
  • , Yu Chen Hsin
  • , Shih Ching Chiu
  • , Kuan Ming Chen
  • , Yi Hui Su
  • , Chih Yao Wang
  • , Shan Yi Yang
  • , Guan Long Chen
  • , Hsin Han Lee
  • , Sk Ziaur Rahaman
  • , I. Jung Wang
  • , Chen Yi Shih
  • , Tsun Chun Chang
  • , Jeng Hua Wei
  • , Shyh Shyuan Sheu
  • , Wei Chung Lo
  • , Shih Chieh Chang
  • Tuo Hung Hou*
*此作品的通信作者

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

U-MRAM, an enabler of a diode-selected cross-point MRAM array, is demonstrated using a mature device structure identical to STT-MRAM. U-MRAM exploits the probabilistic switching of thermal fluctuations using a single write voltage. The asymmetric synthetic antiferromagnetic layer (SAF) enables promising UMRAM properties, including low voltage (0.6 V), high speed (10 ns), excellent endurance (> 10 10), and long retention (>10 years) without an external magnetic field. Diode-selected U-MRAM is a strong candidate for future high-density embedded memory.

原文English
主出版物標題2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9784863488069
DOIs
出版狀態Published - 2023
事件2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, 日本
持續時間: 11 6月 202316 6月 2023

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
2023-June
ISSN(列印)0743-1562

Conference

Conference2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
國家/地區日本
城市Kyoto
期間11/06/2316/06/23

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