摘要
Limitation of the coplanar technology to geometry miniaturization has been investigated. Two-dimensional nature of diffused line capacitance in a coplanar structure is investigated for the first time delineating importance of the sidewall capacitance with decreasing feature size of devices. The effects of field channel-stop ion implantation on the narrow-channel effect, the field MOS threshold voltage, and the junction breakdown voltage are also discussed.
原文 | English |
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頁(從 - 到) | 625-630 |
頁數 | 6 |
期刊 | IEEE Transactions on Electron Devices |
卷 | 29 |
發行號 | 4 |
DOIs | |
出版狀態 | Published - 4月 1982 |