Trapping/Detrapping Kinetic Modeling under Positive/Negative Gate Stress Including Inhibition Dynamics in 4H-SiC MOS Capacitors

Shivendra Kumar Singh, Bang Ren Chen, Zhen Hong Huang, Tian Li Wu*, Yogesh Singh Chauhan

*此作品的通信作者

研究成果: Article同行評審

摘要

Incorporating inhibition dynamics for the first time, in this work, we successfully model the trapping and detrapping kinetics under positive and negative bias stress in 4H-SiC MOS-capacitors. The positive/negative gate bias stress is applied during extended measure stress measure (eMSM)-fast C-V measurements, demonstrating noticeable trapping/detrapping dynamics. Analytical expressions based on the inhibition mechanism are developed to successfully model the trapping/detrapping phenomenon and estimate the location of the trap, which is found to be 1 nm from the dielectric/SiC interface due to border/interface traps. The developed analytical model can provide valuable insights in understanding positive/negative bias instability in SiC technology.

原文English
頁(從 - 到)200-205
頁數6
期刊IEEE Transactions on Electron Devices
71
發行號1
DOIs
出版狀態Published - 1 1月 2024

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