The physical mechanism of transient-induced latchup (TLU) in CMOS ICs has been clearly characterized by device simulation and experimental verification in time domain perspective. An underdamped sine-wave-like voltage has been clarified as the real TLU-triggering stimulus under system-level electrostatic discharge (ESD) test. The specific "sweep-back" current caused by the minority carriers stored within the pnpn structure of CMOS ICs has been qualitatively proved to be the major cause of TLU.
|頁（從 - 到）||937-940|
|期刊||Technical Digest - International Electron Devices Meeting, IEDM|
|出版狀態||Published - 1 12月 2004|
|事件||IEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States|
持續時間: 13 12月 2004 → 15 12月 2004