TY - GEN
T1 - Topology-driven cell layout migration with collinear constraints
AU - Fu, De Shiun
AU - Chaung, Ying Zhih
AU - Lin, Yen Hung
AU - Li, Yih-Lang
PY - 2009
Y1 - 2009
N2 - Traditional layout migration focuses on area minimization, thus suffered wire distortion, which caused loss of layout topology. A migrated layout inheriting original topology owns original design intention and predictable property, such as wire length which determines the path delay importantly. This work presents a new rectangular topological layout to preserve layout topology and combine its flexibility of handling wires with traditional scan-line based compaction algorithm for area minimization. The proposed migration flow contains devices and wires extraction, topological layout construction, unidirectional compression combining scan-line algorithm with collinear equation solver, and wire restoration. Experimental results show that cell topology is well preserved, and a several times runtime speedup is achieved as compared with recent migration research based on ILP (integer linear programming) formulation.
AB - Traditional layout migration focuses on area minimization, thus suffered wire distortion, which caused loss of layout topology. A migrated layout inheriting original topology owns original design intention and predictable property, such as wire length which determines the path delay importantly. This work presents a new rectangular topological layout to preserve layout topology and combine its flexibility of handling wires with traditional scan-line based compaction algorithm for area minimization. The proposed migration flow contains devices and wires extraction, topological layout construction, unidirectional compression combining scan-line algorithm with collinear equation solver, and wire restoration. Experimental results show that cell topology is well preserved, and a several times runtime speedup is achieved as compared with recent migration research based on ILP (integer linear programming) formulation.
UR - http://www.scopus.com/inward/record.url?scp=77951018875&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2009.5413118
DO - 10.1109/ICCD.2009.5413118
M3 - Conference contribution
AN - SCOPUS:77951018875
SN - 9781424450282
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 439
EP - 444
BT - 2009 IEEE International Conference on Computer Design, ICCD 2009
T2 - 2009 IEEE International Conference on Computer Design, ICCD 2009
Y2 - 4 October 2009 through 7 October 2009
ER -