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Timing and power fluctuations on gate-all-around nanowire CMOS circuit induced by various sources of random discrete dopants
Wen Li Sung, Pei Jung Chao,
Yiming Li
電信工程研究所
研究成果
:
Conference contribution
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同行評審
2
引文 斯高帕斯(Scopus)
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指紋
指紋
深入研究「Timing and power fluctuations on gate-all-around nanowire CMOS circuit induced by various sources of random discrete dopants」主題。共同形成了獨特的指紋。
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Keyphrases
Channel Doping
42%
Circuit Performance
14%
Complementary Metal Oxide Semiconductor
100%
Device Simulation
14%
Drain Extension
28%
Dynamic Power
14%
Gate Capacitance
14%
Gate-all-around
100%
Ioff
14%
Metal-oxide-semiconductor Devices
14%
Nanowires
100%
Noise Margin
14%
Noise Power
14%
Nonequilibrium Green's Function
14%
NWFET
28%
P-type
28%
Power Consumption
14%
Power Fluctuation
100%
Quantum Mechanical
14%
Random Discrete Dopants
100%
Random Dopant Fluctuation
28%
Semiconductor Technology
14%
Short-circuit Power
14%
Silicon Nanowires (SiNWs)
14%
Small Variation
14%
Static Power Consumption
14%
Sub-7 Nm
14%
Technology Node
14%
Threshold Voltage
14%
Time Fluctuation
100%
Timing Noise
14%
Engineering
Circuit Performance
16%
Complementary Metal-Oxide-Semiconductor
100%
Complementary Metal-Oxide-Semiconductor Device
16%
Dopants
100%
Electric Power Utilization
33%
Gate Capacitance
16%
Greens Function Model
16%
Key Parameter
16%
Metal-Oxide-Semiconductor Field-Effect Transistor
33%
Nanowire
100%
Nodes
16%
Noise Margin
16%
Noise Power
16%
Nonequilibrium
16%
Power Fluctuation
100%
Material Science
Capacitance
14%
Complementary Metal-Oxide-Semiconductor Device
100%
Doping (Additives)
100%
Electronic Circuit
100%
Functional Modeling
14%
Metal-Oxide-Semiconductor Field-Effect Transistor
28%
Nanowire
100%
Silicon
14%