Three dimensional integration of ReRAMs

Boris Hudec; Che-Chia Chang; I-Ting Wang; Karol Frohlich; Tuo-Hung Hou

doi:10.1109/NANO.2018.8626351

Three dimensional integration of ReRAMs

Boris Hudec^*, Che-Chia Chang, I-Ting Wang, Karol Frohlich, Tuo-Hung Hou

^*此作品的通信作者

電機工程學系

研究成果: Conference contribution › 同行評審

摘要

Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.

3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

原文	English
主出版物標題	2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)
發行者	IEEE
頁面	1-2
頁數	2
DOIs	https://doi.org/10.1109/NANO.2018.8626351
出版狀態	Published - 23 7月 2018
事件	18th IEEE International Conference on Nanotechnology (IEEE-NANO) - Cork, Ireland 持續時間: 23 7月 2018 → 26 7月 2018

出版系列

名字	IEEE International Conference on Nanotechnology
發行者	IEEE
ISSN（列印）	1944-9399

Conference

Conference	18th IEEE International Conference on Nanotechnology (IEEE-NANO)
國家/地區	Ireland
城市	Cork
期間	23/07/18 → 26/07/18

存取文件

10.1109/NANO.2018.8626351

引用此

@inproceedings{3f27506d899f4ad698b26e101cc434ac,

title = "Three dimensional integration of ReRAMs",

abstract = "Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.",

author = "Boris Hudec and Che-Chia Chang and I-Ting Wang and Karol Frohlich and Tuo-Hung Hou",

year = "2018",

month = jul,

day = "23",

doi = "10.1109/NANO.2018.8626351",

language = "English",

series = "IEEE International Conference on Nanotechnology",

publisher = "IEEE",

pages = "1--2",

booktitle = "2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)",

note = "null ; Conference date: 23-07-2018 Through 26-07-2018",

}

Hudec, B, Chang, C-C, Wang, I-T, Frohlich, K & Hou, T-H 2018, Three dimensional integration of ReRAMs. 於 2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)., 8626351, IEEE International Conference on Nanotechnology, IEEE, 頁 1-2, 18th IEEE International Conference on Nanotechnology (IEEE-NANO), Cork, Ireland, 23/07/18. https://doi.org/10.1109/NANO.2018.8626351

TY - GEN

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AU - Hudec, Boris

AU - Chang, Che-Chia

AU - Wang, I-Ting

AU - Frohlich, Karol

AU - Hou, Tuo-Hung

PY - 2018/7/23

Y1 - 2018/7/23

N2 - Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

AB - Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

U2 - 10.1109/NANO.2018.8626351

DO - 10.1109/NANO.2018.8626351

M3 - Conference contribution

T3 - IEEE International Conference on Nanotechnology

SP - 1

EP - 2

BT - 2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)

PB - IEEE

Y2 - 23 July 2018 through 26 July 2018

ER -

Three dimensional integration of ReRAMs

摘要

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Conference

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