Three-dimensional circuit integration based on self-synchronized RF-interconnect using capacitive coupling

Qun Gu*, Zhiwei Xu, Jongsun Kim, Jenwei Ko, Mau-Chung Chang

*此作品的通信作者

研究成果: Conference article同行評審

5 引文 斯高帕斯(Scopus)

摘要

A self-synchronized RF-interconnect (SSRFI), based on capacitive coupling and peak signal detection, is presented. In this SSRFI, small coupling capacitor (60fF) is used to interconnect vertical active layers in 3-Dimensional IC. The demonstrated SSRFI system, including both transmitter and receiver, has been designed, fabricated and verified in UMC 0.18μm CMOS with a PRBS data rate of 3Gbit/s, a BER of 1.2×10 -10 and a rms jitter of 1.28ps. The core circuit burns 4mW from a 1.8V supply and occupies 0.02mm 2 chip area.

原文English
頁(從 - 到)96-97
頁數2
期刊Digest of Technical Papers - Symposium on VLSI Technology
DOIs
出版狀態Published - 1 十月 2004
事件2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States
持續時間: 15 六月 200417 六月 2004

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