Thermal Sensor Placement for Multicore Systems Based on Low-Complex Compressive Sensing Theory

Kun Chih Chen*, Hsueh Wen Tang, Chi Hsun Wu, Chia Hsin Chen

*此作品的通信作者

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)

摘要

As the complexity of the multicore system grows, the large workload diversity results in serious thermal problems. In a practical way, the number of placed thermal sensors is usually limited due to the manufacturing cost. In recent years, the compressive sensing (CS) theory is proven as an efficient way to reconstruct the original signal by using fewer sampling data. However, due to the high computational complexity during the signal reconstruction, the CS theory is not appropriate to apply to the real-time temperature monitoring in the current multicore system. In this article, we propose a grid-based sensor placement approach to placement the number-limited thermal sensors on the target multicore system. On the other hand, we adopt the matrix inversion bypass (MIB) property to reduce the computational complexity of two widely used signal reconstruction approaches in CS theory [i.e., the orthogonal matching pursuit (OMP) and stagewise OMP (StOMP)]. Due to the characteristic of random sampling in CS theory, the complexity of thermal sensor placement for multicore systems can be reduced significantly. In addition, the proposed MIB-based temperature reconstruction method helps to satisfy the requirement of real-time temperature estimation. The experimental results show that the proposed approach can reduce 57%-93% average full-system temperature reconstruction error compared with the previous non-CS-based approaches. Besides, we can also reduce 22%-41% computing latency compared with the current CS-based reconstruction algorithm. Due to the MIB-based operation, we can bypass the matrix inversion operation for temperature reconstruction. Therefore, the hardware overhead of the temperature reconstruction unit can be reduced significantly. Compared with the conventional approaches, we can reduce 24%-87% area overhead and improve 50%-220% hardware efficiency.

原文English
頁(從 - 到)5100-5111
頁數12
期刊IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
41
發行號11
DOIs
出版狀態Published - 1 11月 2022

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