摘要
With the thermal effect, improper analog placements may degrade circuit performance because the thermal impact from power devices can affect electrical characteristics of the thermally-sensitive devices. There is not much previous work that considers the desired placement configuration between power and thermally-sensitive devices for a better thermal profile to reduce the thermally-induced mismatches. This paper first introduces the properties of a desired thermal profile for better thermal matching of the matched devices. It then presents a thermal-driven analog placement methodology to achieve the desired thermal profile and to consider the best device matching under the thermal profile while satisfying the symmetry and the common-centroid constraints. Experimental results based on real analog circuits show that the proposed approach can achieve the best analog circuit performance/accuracy with the least impact due to the thermal gradient, among existing works.
原文 | English |
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文章編號 | 5715604 |
頁(從 - 到) | 325-336 |
頁數 | 12 |
期刊 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
卷 | 30 |
發行號 | 3 |
DOIs | |
出版狀態 | Published - 1 3月 2011 |