The zero-temperature-coefficient point modeling of DTMOS in CMOS Integration

Kuan Ti Wang; Wan Chyi Lin; Tien-Sheng Chao

doi:10.1109/LED.2010.2057404

The zero-temperature-coefficient point modeling of DTMOS in CMOS Integration

Kuan Ti Wang^*, Wan Chyi Lin, Tien-Sheng Chao

^*此作品的通信作者

電子物理學系

研究成果: Article › 同行評審

5 引文斯高帕斯（Scopus）

摘要

For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower V_g (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.

原文	English
文章編號	5540257
頁（從 - 到）	1071-1073
頁數	3
期刊	IEEE Electron Device Letters
卷	31
發行號	10
DOIs	https://doi.org/10.1109/LED.2010.2057404
出版狀態	Published - 1 10月 2010

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abstract = "For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower Vg (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.",

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AU - Chao, Tien-Sheng

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N2 - For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower Vg (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.

AB - For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower Vg (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.

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KW - strain

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The zero-temperature-coefficient point modeling of DTMOS in CMOS Integration

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