跳至主導覽
跳至搜尋
跳過主要內容
國立陽明交通大學研發優勢分析平台 首頁
English
中文
首頁
人員
單位
研究成果
計畫
獎項
活動
貴重儀器
影響
按專業知識、姓名或所屬機構搜尋
The Impact of Nano Device Parameters Variations and Scaling Strategy for High Frequency Performance Enhancement in Nanoscale CMOS
Adhi Cahyo Wijaya, Jinq Min Lin,
Jyh Chyurn Guo
電子研究所
電機工程學系
研究成果
:
Conference contribution
›
同行評審
總覽
指紋
指紋
深入研究「The Impact of Nano Device Parameters Variations and Scaling Strategy for High Frequency Performance Enhancement in Nanoscale CMOS」主題。共同形成了獨特的指紋。
排序方式
重量
按字母排序
Keyphrases
Channel Current
50%
Circuit Performance
50%
Cut-off Frequency
50%
DC Characteristics
50%
De-embedding
50%
Device Parameters
100%
Gate Capacitance
50%
High Frequency Characterization
50%
High Frequency Parameters
50%
High-frequency Performance
100%
Logic Circuit
50%
Multiple Fingers
100%
Nanodevices
100%
Nanoscale CMOS
100%
Nanoscale Devices
50%
NMOSFET
100%
Parameter Extraction
50%
Parameter Scaling
100%
Parameter Variation
100%
Performance Enhancement
100%
Process Variation
50%
Scaling Strategies
100%
Transconductance
50%
Engineering
Circuit Performance
50%
Cutoff Frequency
50%
Experimental Result
50%
Frequency Characterization
50%
Gate Capacitance
50%
Logic Circuit
50%
Nanoscale
100%
Parameter Variation
100%
Process Variation
50%
Material Science
Capacitance
100%
Electronic Circuit
100%
Nanodevice
100%
Parameter Extraction
100%