@inproceedings{36347345207c401c9ced53656a990f19,
title = "The Impact of Nano Device Parameters Variations and Scaling Strategy for High Frequency Performance Enhancement in Nanoscale CMOS",
abstract = "This paper presents a new observation in sub-60nm multi-finger (MF) nMOSFETs with nearly the same dc characteristics like channel current (IDS) and transconductance (gm) from different dies/lots but a dramatic difference at high frequency parameters, such as intrinsic gate capacitances (Cgg) and unit gain cut-off frequency fT after a clean deembedding to the bottom metal. The experimental results reveal an important finding that nanoscale devices even with inter-dies/lots process variations may keep the golden die target for dc and logic circuits performance but exhibit a significant deviation in high frequency performance. A comprehensive high frequency characterization and precise device parameters extraction has been carried out on various MF nMOSFETs to identify the root causes and explore the underlying mechanisms.",
author = "Wijaya, {Adhi Cahyo} and Lin, {Jinq Min} and Guo, {Jyh Chyurn}",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022 ; Conference date: 18-04-2022 Through 21-04-2022",
year = "2022",
doi = "10.1109/VLSI-TSA54299.2022.9770962",
language = "English",
series = "2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022",
address = "United States",
}