The Impact of Nano CMOS Device Scaling on High Frequency Performance and Optimization Principle for fMAXBoost

Adhi Cahyo Wijaya, Jinq Min Lin, Jyh Chyurn Guo

研究成果: Conference contribution同行評審

摘要

In this paper, the impact of nano CMOS technology scaling on the high frequency performance aimed at super-350 GHz fT and fMAX has been investigated. An extensive comparison of multi-finger (MF) nMOSFETs designed and fabricated in 90-nm and 40-nm technologies indicate 71∼128% boost of fT but only 11∼49% increase of fMAX in three MF nMOSFETs when scaling from 90-nm to 40-nm technologies. The undesired increase of gate impedance and output conductance caused by device scaling appear as the root causes, which limit the enhancement of fMAX. This important finding provides a useful guideline for the simultaneous boost and optimization of fT and fMAX aimed at mm-Wave and sub-THz CMOS circuits design.

原文English
主出版物標題2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350334166
DOIs
出版狀態Published - 2023
事件2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, 台灣
持續時間: 17 4月 202320 4月 2023

出版系列

名字2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
國家/地區台灣
城市Hsinchu
期間17/04/2320/04/23

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