The first Ge nanosheets GAAFET CMOS inverters fabricated by 2D Ge/Si multilayer epitaxy, Ge/Si selective etching

Chun Lin Chu, Guang Li Luo*, Shih Hong Chen, Wei Yuan Chang, Wen Fa Wu, Wen Kuan Yeh

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

Stacked Ge nanosheets (NSs) GAA FET CMOS inverters are demonstrated for the first time. In this work, for formation of well-defined stacked Ge NSs, we intentionally grow large mismatch Ge/Si multilayers rather than Ge/GeSi multilayers as the starting material for the following better selective etching between Ge/Si. In order to avoid island growth, Ge/Si multilayers must be grown at a low temperature. For selective etching, we found that, at a proper temperature, the Si layers can be easily etched away over Ge layers with good selectivity by TMAH solution. Additionally we found the dislocations in suspended Ge sheets are more easily to be removed than the case that Ge layers are still tied with Si layers. Finally, a functional Ge NSs GAAFET CMOS inverter with maximum voltage gain of 25V/V was demonstrated.

原文English
主出版物標題VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665419345
DOIs
出版狀態Published - 19 四月 2021
事件2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021 - Hsinchu, Taiwan
持續時間: 19 四月 202122 四月 2021

出版系列

名字VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

Conference

Conference2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021
國家/地區Taiwan
城市Hsinchu
期間19/04/2122/04/21

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