The Effects of Source/Drain Resistance on Deep Submicrometer Device Performance

Min Chie Jeng, James E. Chung, Ping Keung Ko, Chen-Ming Hu

研究成果: Article同行評審

14 引文 斯高帕斯(Scopus)

摘要

As MOSFET channel lengths approach the deep-submi-crometer regime, performance degradation due to parasitic source/drain resistance (Rsj) becomes an important factor to consider in device scaling. This brief examines the effects of Rsd on the device performance of deep-submicrometer non-LDD n-channel MOSFET’s. Reduction in the measured saturation drain current (Rsd = 600 Q/ira) relative to the ideal saturation current (Rsd = 0.0 Q ? ^m) is about 4% for Lc = 0.7 Mm and Tox = 15.6 am, and 10% for Leff = 0.3 Mm and Tox - 8.6 qm. Reduction of current in the linear regime and reduction of the simulated ring oscillator speed are both about 3 times higher. Silicidization of the source/drain is estimated to eliminate as much as 50% of the performance degradation.

原文English
頁(從 - 到)2408-2410
頁數3
期刊IEEE Transactions on Electron Devices
37
發行號11
DOIs
出版狀態Published - 1 1月 1990

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