Technology scaling impact on VLSI interconnect and low swing signaling technique

The aim of this study is to analyze the effectiveness and limitations of different on-chip interconnect signaling techniques in deep submicron technology (UMC 90 nm). In this study, the conventional interconnect interface circuit (buffer or inverter) and modern interconnect interface circuit using level converter has been analyzed and their performances are reported in this study. The applied square wave input frequency ranges between 2 and 800 MHz, while the supply voltage is taken as 1 V. Similarly, the reference voltage is taken as 500 mv and load capacitance is 1 pF. The performance of each circuit is analyzed on the benchmarked interconnect (RC or RLC 3-π). In our analysis, we have observed that as compared to the conventional interconnect interface scheme (buffer or inverter), the low swing signaling technique using the low-VT-devices-based level converter can be used to obtain 3-times energy saving.