Techniques for the trace-driven simulation of cache performance

Susan J. Eggers; Edward D. Lazowska; Yi-Bing Lin

Techniques for the trace-driven simulation of cache performance

Susan J. Eggers^*, Edward D. Lazowska, Yi-Bing Lin

^*此作品的通信作者

智慧與綠能産學研究所

研究成果: Conference article › 同行評審

1 引文斯高帕斯（Scopus）

摘要

A survey is presented of three techniques for the trace-driven simulation of cache designs: stack analysis methodologies that make it possible to obtain performance measures for a wide variety of cache designs from a single run of the simulator, compression algorithms specifically tailored to memory reference traces, and an approach to parallel trace-driven simulation of multiprocessor caches that dramatically reduces the simulation's synchronization and thus its running time.

原文	English
頁（從 - 到）	1042-1046
頁數	5
期刊	Winter Simulation Conference Proceedings
出版狀態	Published - 1 十二月 1989
事件	1989 Winter Simulation Conference Proceedings - WSC '89 - Washington, DC, USA 持續時間: 4 十二月 1989 → 6 十二月 1989

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title = "Techniques for the trace-driven simulation of cache performance",

abstract = "A survey is presented of three techniques for the trace-driven simulation of cache designs: stack analysis methodologies that make it possible to obtain performance measures for a wide variety of cache designs from a single run of the simulator, compression algorithms specifically tailored to memory reference traces, and an approach to parallel trace-driven simulation of multiprocessor caches that dramatically reduces the simulation's synchronization and thus its running time.",

author = "Eggers, {Susan J.} and Lazowska, {Edward D.} and Yi-Bing Lin",

year = "1989",

month = dec,

day = "1",

language = "English",

pages = "1042--1046",

journal = "Winter Simulation Conference Proceedings",

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note = "null ; Conference date: 04-12-1989 Through 06-12-1989",

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TY - JOUR

T1 - Techniques for the trace-driven simulation of cache performance

AU - Eggers, Susan J.

AU - Lazowska, Edward D.

AU - Lin, Yi-Bing

PY - 1989/12/1

Y1 - 1989/12/1

N2 - A survey is presented of three techniques for the trace-driven simulation of cache designs: stack analysis methodologies that make it possible to obtain performance measures for a wide variety of cache designs from a single run of the simulator, compression algorithms specifically tailored to memory reference traces, and an approach to parallel trace-driven simulation of multiprocessor caches that dramatically reduces the simulation's synchronization and thus its running time.

AB - A survey is presented of three techniques for the trace-driven simulation of cache designs: stack analysis methodologies that make it possible to obtain performance measures for a wide variety of cache designs from a single run of the simulator, compression algorithms specifically tailored to memory reference traces, and an approach to parallel trace-driven simulation of multiprocessor caches that dramatically reduces the simulation's synchronization and thus its running time.

UR - http://www.scopus.com/inward/record.url?scp=0024872603&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0024872603

SP - 1042

EP - 1046

JO - Winter Simulation Conference Proceedings

JF - Winter Simulation Conference Proceedings

SN - 0275-0708

Y2 - 4 December 1989 through 6 December 1989

ER -

Techniques for the trace-driven simulation of cache performance

摘要

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