System-level ESD protection design with on-chip transient detection circuit

Cheng Cheng Yen*, Ming-Dou Ker, Pi Chia Shih

*此作品的通信作者

    研究成果: Conference contribution同行評審

    摘要

    A new on-chip transient detection circuit for systemlevel electrostatic discharge (ESD) protection is proposed. By including this new proposed on-chip transient detection circuit, a hardware/firmware solution cooperated with power-on reset circuit has been analyzed to fix the system-level ESD issues. The circuit performance to detect different positive and negative fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.13μm CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system-level ESD zapping.

    原文English
    主出版物標題ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
    頁面616-619
    頁數4
    DOIs
    出版狀態Published - 2006
    事件ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France
    持續時間: 10 12月 200613 12月 2006

    出版系列

    名字Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

    Conference

    ConferenceICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
    國家/地區France
    城市Nice
    期間10/12/0613/12/06

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