Symmetric vertical-channel nickel-salicided poly-Si thin-film transistors with self-aligned oxide overetching structures

Yi Hong Wu*, Po Yi Kuo, Yi Hsien Lu, Yi Hsuan Chen, Tsung Yu Chiang, Kuan Ti Wang, Li Chen Yen, Tien-Sheng Chao

*此作品的通信作者

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

This paper reports the impacts of NH3 plasma treatment time, oxide overetching depth, and gate oxide thickness on symmetric vertical-channel Ni-salicided poly-Si thin-film transistors (VSA-TFTs) for the first time. off-state currents may be improved by increasing the oxide overetching depth. The on/off current ratio may be also improved by increasing the oxide overetching depth. The NH3 plasma optimum treatment time of VSA-TFTs is significantly shorter than that of conventional top-gate horizontal-channel TFTs. The performance of VSA-TFTs is degraded by NH3 plasma treatment for too long a time. VSA-TFTs with 15-nm gate oxide thickness display better subthreshold swing (<150 mV/dec) than VSA-TFTs with 30-nm gate oxide thickness. off-state currents can be improved by increasing Lmask, even when the oxide overetching depth and the gate oxide thickness are changed.

原文English
文章編號5765490
頁(從 - 到)2008-2013
頁數6
期刊IEEE Transactions on Electron Devices
58
發行號7
DOIs
出版狀態Published - 1 7月 2011

指紋

深入研究「Symmetric vertical-channel nickel-salicided poly-Si thin-film transistors with self-aligned oxide overetching structures」主題。共同形成了獨特的指紋。

引用此