Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs

Shih En Huang; Pin Su

doi:10.1109/VLSI-TSA51926.2021.9440110

Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs

Shih En Huang, Pin Su

研究成果: Conference contribution › 同行評審

1 引文斯高帕斯（Scopus）

摘要

This work investigates the source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs (NC-FinFETs) using theoretical quantum model corroborated with TCAD numerical simulation. Our study shows that, due to the impact of negative capacitance on the potential profile and tunneling distance between source and drain, the short-channel effects and the source-to-drain tunneling current can be substantially reduced. The gap in DIBL and subthreshold swing between InGaAs and Si devices with extremely short gate length (~12 nm) can become closer due to the NC effect.

原文	English
主出版物標題	VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9781665419345
DOIs	https://doi.org/10.1109/VLSI-TSA51926.2021.9440110
出版狀態	Published - 19 4月 2021
事件	2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021 - Hsinchu, 台灣持續時間: 19 4月 2021 → 22 4月 2021

出版系列

名字	VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

Conference

Conference	2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021
國家/地區	台灣
城市	Hsinchu
期間	19/04/21 → 22/04/21

存取文件

10.1109/VLSI-TSA51926.2021.9440110

其它文件與鏈接

Link to publication in Scopus

引用此

Huang, S. E., & Su, P. (2021). Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs. 於 VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings 文章 9440110 (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA51926.2021.9440110

Huang, Shih En ; Su, Pin. / Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs. VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings).

@inproceedings{ad85059d51244a988311609e3de8d344,

title = "Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs",

abstract = "This work investigates the source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs (NC-FinFETs) using theoretical quantum model corroborated with TCAD numerical simulation. Our study shows that, due to the impact of negative capacitance on the potential profile and tunneling distance between source and drain, the short-channel effects and the source-to-drain tunneling current can be substantially reduced. The gap in DIBL and subthreshold swing between InGaAs and Si devices with extremely short gate length (~12 nm) can become closer due to the NC effect.",

author = "Huang, {Shih En} and Pin Su",

note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021 ; Conference date: 19-04-2021 Through 22-04-2021",

year = "2021",

month = apr,

day = "19",

doi = "10.1109/VLSI-TSA51926.2021.9440110",

language = "English",

series = "VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings",

address = "美國",

}

Huang, SE & Su, P 2021, Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs. 於 VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings., 9440110, VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings, Institute of Electrical and Electronics Engineers Inc., 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021, Hsinchu, 台灣, 19/04/21. https://doi.org/10.1109/VLSI-TSA51926.2021.9440110

Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs. / Huang, Shih En; Su, Pin.
VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. 9440110 (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs

AU - Huang, Shih En

AU - Su, Pin

PY - 2021/4/19

Y1 - 2021/4/19

N2 - This work investigates the source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs (NC-FinFETs) using theoretical quantum model corroborated with TCAD numerical simulation. Our study shows that, due to the impact of negative capacitance on the potential profile and tunneling distance between source and drain, the short-channel effects and the source-to-drain tunneling current can be substantially reduced. The gap in DIBL and subthreshold swing between InGaAs and Si devices with extremely short gate length (~12 nm) can become closer due to the NC effect.

AB - This work investigates the source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs (NC-FinFETs) using theoretical quantum model corroborated with TCAD numerical simulation. Our study shows that, due to the impact of negative capacitance on the potential profile and tunneling distance between source and drain, the short-channel effects and the source-to-drain tunneling current can be substantially reduced. The gap in DIBL and subthreshold swing between InGaAs and Si devices with extremely short gate length (~12 nm) can become closer due to the NC effect.

UR - http://www.scopus.com/inward/record.url?scp=85108161151&partnerID=8YFLogxK

U2 - 10.1109/VLSI-TSA51926.2021.9440110

DO - 10.1109/VLSI-TSA51926.2021.9440110

M3 - Conference contribution

AN - SCOPUS:85108161151

T3 - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

BT - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021

Y2 - 19 April 2021 through 22 April 2021

ER -

Huang SE, Su P. Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs. 於 VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2021. 9440110. (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings). doi: 10.1109/VLSI-TSA51926.2021.9440110

Suppressed source-to-drain tunneling and short-channel effects for MFIS-type InGaAs and Si negative-capacitance FinFETs

摘要

出版系列

Conference

存取文件

其它文件與鏈接

指紋

引用此