Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa*, Shih Ting Lin, Yih Lang Li, Hidetoshi Onodera

*此作品的通信作者

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

原文English
頁(從 - 到)24-26
頁數3
期刊IPSJ Transactions on System LSI Design Methodology
14
DOIs
出版狀態Published - 8月 2021

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