Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa; Shih Ting Lin; Yih Lang Li; Hidetoshi Onodera

doi:10.2197/IPSJTSLDM.14.24

Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa^*, Shih Ting Lin, Yih Lang Li, Hidetoshi Onodera

^*此作品的通信作者

研究成果: Article › 同行評審

2 引文斯高帕斯（Scopus）

摘要

This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

原文	English
頁（從 - 到）	24-26
頁數	3
期刊	IPSJ Transactions on System LSI Design Methodology
卷	14
DOIs	https://doi.org/10.2197/IPSJTSLDM.14.24
出版狀態	Published - 8月 2021

存取文件

10.2197/IPSJTSLDM.14.24

其它文件與鏈接

Link to publication in Scopus

引用此

@article{f69c8eb7dad94e0da631faeb9371749a,

title = "Supplemental PDK for ASAP7 using synopsys flow",

abstract = "This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author{\textquoteright}s GitHub site for both acamemical and educational usage.",

keywords = "Process design kit, ASAP7",

author = "Shinichi Nishizawa and Lin, {Shih Ting} and Li, {Yih Lang} and Hidetoshi Onodera",

note = "Publisher Copyright: c 2021 Information Processing Society of Japan",

year = "2021",

month = aug,

doi = "10.2197/IPSJTSLDM.14.24",

language = "English",

volume = "14",

pages = "24--26",

journal = "IPSJ Transactions on System LSI Design Methodology",

issn = "1882-6687",

publisher = "Information Processing Society of Japan",

}

TY - JOUR

T1 - Supplemental PDK for ASAP7 using synopsys flow

AU - Nishizawa, Shinichi

AU - Lin, Shih Ting

AU - Li, Yih Lang

AU - Onodera, Hidetoshi

PY - 2021/8

Y1 - 2021/8

N2 - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

AB - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

KW - Process design kit, ASAP7

UR - http://www.scopus.com/inward/record.url?scp=85113409614&partnerID=8YFLogxK

U2 - 10.2197/IPSJTSLDM.14.24

DO - 10.2197/IPSJTSLDM.14.24

M3 - Article

AN - SCOPUS:85113409614

SN - 1882-6687

VL - 14

SP - 24

EP - 26

JO - IPSJ Transactions on System LSI Design Methodology

JF - IPSJ Transactions on System LSI Design Methodology

ER -

Supplemental PDK for ASAP7 using synopsys flow

摘要

存取文件

其它文件與鏈接

指紋

引用此