Study on the ESD-induced gate-oxide breakdown and the protection solution in 28nm high-k metal-gate CMOS technology

Chun Yu Lin, Ming-Dou Ker, Pin Hsin Chang, Wen Tai Wang

研究成果: Conference contribution同行評審

9 引文 斯高帕斯(Scopus)

摘要

To protect the IC chips against the electrostatic discharge (ESD) damages in 28nm high-k metal-gate (HKMG) CMOS technology, the ESD protection consideration was studied in this work. The ESD design window was found to be within 1V and 5.1V in 28nm HKMG CMOS technology. An ESD protection device of PMOS with embedded silicon-controlled rectifier (SCR) was investigated to be suitable for ESD protection in such narrow ESD design window.

原文English
主出版物標題2015 IEEE Nanotechnology Materials and Devices Conference, NMDC 2015
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781467393621
DOIs
出版狀態Published - 22 3月 2016
事件10th IEEE Nanotechnology Materials and Devices Conference, NMDC 2015 - Anchorage, United States
持續時間: 12 9月 201516 9月 2015

出版系列

名字2015 IEEE Nanotechnology Materials and Devices Conference, NMDC 2015

Conference

Conference10th IEEE Nanotechnology Materials and Devices Conference, NMDC 2015
國家/地區United States
城市Anchorage
期間12/09/1516/09/15

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