Study on the effects of Si implantation on the interface of 4H-SiC lateral MOSFETs

Jheng Yi Jiang*, Jia-Qing Hung, Pin-Wei Huang, Tian-Li Wu, Huang Chih-Fang

*此作品的通信作者

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this study, Si implantation was used to improve the interface properties of SiC/SiO2 in 4H-SiC lateral MOSFETs. In lateral n-channel MOSFETs, a 4%-6% improvement on the linear and saturation current was observed with Si implantation, From high/low-frequency CV measurements, the Si implanted n-type MOS capacitor showed a 20% lower interface state density than the non-implanted ones at an energy level of E-C - E = 0.2 eV, without degrading oxide integrity. Lateral p-channel MOSFETs, on the other hand, showed a 36.5% reduction in the linear current and a 16.6% reduction in the saturation current with Si implantation. Furthermore, the temperature coefficients of lateral and vertical MOSFETs implanted, by Si ere monitored up to 175 degrees C. The temperature coefficients of the Si-implanted n-channel and p-channel lateral MOSFETs were nearly identical to those of their non-implanted counterparts. (C) 2020 The Japan Society of Applied Physics
原文English
期刊Japanese Journal of Applied Physics, Part 2: Letters
59
發行號SG
DOIs
出版狀態Published - 1 4月 2020

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