Structured LDPC codes with low error floor based on PEG Tanner graphs

Yi Kai Lin*, Chih Lung Chen, Yen Chin Liao, Hsie-Chia Chang

*此作品的通信作者

    研究成果: Conference contribution同行評審

    21 引文 斯高帕斯(Scopus)

    摘要

    Progressive edge-growth (PEG) algorithm was proven to be a simple and effective approach to design good LDPC codes. However, the Tanner graph constructed by PEG algorithm is non-structured which leads the positions of 1's of the corresponding parity check matrix fully random. In this paper, we propose a general method based on PEG algorithm to construct structured Tanner graphs. These hardware-oriented LDPC codes can reduce the VLSI implementation complexity. Similar to PEG method, our CP-PEG approach can be used to construct both regular and irregular Tanner graphs with flexible parameters. For the consideration of encoding complexity and error floor, the modifications of proposed algorithm are discussed. Simulation results show that our codes, in terms of bit error rate (BER) or packet error rate (PER), outperform other PEG-based LDPC codes and are better than the codes in IEEE 802.16e.

    原文English
    主出版物標題2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
    頁面1846-1849
    頁數4
    DOIs
    出版狀態Published - 19 9月 2008
    事件2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
    持續時間: 18 5月 200821 5月 2008

    出版系列

    名字Proceedings - IEEE International Symposium on Circuits and Systems
    ISSN(列印)0271-4310

    Conference

    Conference2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
    國家/地區United States
    城市Seattle, WA
    期間18/05/0821/05/08

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