TY - GEN
T1 - Structured LDPC codes with low error floor based on PEG Tanner graphs
AU - Lin, Yi Kai
AU - Chen, Chih Lung
AU - Liao, Yen Chin
AU - Chang, Hsie-Chia
PY - 2008/9/19
Y1 - 2008/9/19
N2 - Progressive edge-growth (PEG) algorithm was proven to be a simple and effective approach to design good LDPC codes. However, the Tanner graph constructed by PEG algorithm is non-structured which leads the positions of 1's of the corresponding parity check matrix fully random. In this paper, we propose a general method based on PEG algorithm to construct structured Tanner graphs. These hardware-oriented LDPC codes can reduce the VLSI implementation complexity. Similar to PEG method, our CP-PEG approach can be used to construct both regular and irregular Tanner graphs with flexible parameters. For the consideration of encoding complexity and error floor, the modifications of proposed algorithm are discussed. Simulation results show that our codes, in terms of bit error rate (BER) or packet error rate (PER), outperform other PEG-based LDPC codes and are better than the codes in IEEE 802.16e.
AB - Progressive edge-growth (PEG) algorithm was proven to be a simple and effective approach to design good LDPC codes. However, the Tanner graph constructed by PEG algorithm is non-structured which leads the positions of 1's of the corresponding parity check matrix fully random. In this paper, we propose a general method based on PEG algorithm to construct structured Tanner graphs. These hardware-oriented LDPC codes can reduce the VLSI implementation complexity. Similar to PEG method, our CP-PEG approach can be used to construct both regular and irregular Tanner graphs with flexible parameters. For the consideration of encoding complexity and error floor, the modifications of proposed algorithm are discussed. Simulation results show that our codes, in terms of bit error rate (BER) or packet error rate (PER), outperform other PEG-based LDPC codes and are better than the codes in IEEE 802.16e.
UR - http://www.scopus.com/inward/record.url?scp=51749115292&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2008.4541800
DO - 10.1109/ISCAS.2008.4541800
M3 - Conference contribution
AN - SCOPUS:51749115292
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1846
EP - 1849
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -