摘要
We study the parametrical yield of memory windows for the metal nanocrystal (NC) Flash memories with consideration of the 3-D electrostatics and channel percolation effects. Monte Carlo parametrical variation that accounts for the number and size fluctuations in NCs as well as channel length is used to determine the threshold voltage distribution and bit error rate for gate length scaling to 20 nm. Devices with nanowire-based channels are compared with planar devices having the same gate stack structure. Scalability prediction by 1-D analysis is found to be very different from 3-D modeling due to underestimation of effective NC coverage and failure to consider the 3-D nature of the channel percolation effect.
原文 | English |
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文章編號 | 5164934 |
頁(從 - 到) | 1729-1735 |
頁數 | 7 |
期刊 | IEEE Transactions on Electron Devices |
卷 | 56 |
發行號 | 8 |
DOIs | |
出版狀態 | Published - 8月 2009 |