SOI and nanoscale MOSFETS

Chen-Ming Hu*

*此作品的通信作者

研究成果: Paper同行評審

13 引文 斯高帕斯(Scopus)

摘要

The use of silicon on insulator (SOI) technology in the fabrication of two scalable metal oxide semiconductor field effect transistors (MOSFET) was discussed. MOSFET scaling involved controlling the channel potential by the gate rather than the drain. Ultrathin body FET was scaled to 20nm gate length. FinFET, a double gate FET was scaled to below 10nm gate length using the technique.

原文English
頁面3-4
頁數2
出版狀態Published - 1 一月 2001
事件Device Research Conference (DRC) - Notre Dame, IN, United States
持續時間: 25 六月 200127 六月 2001

Conference

ConferenceDevice Research Conference (DRC)
國家/地區United States
城市Notre Dame, IN
期間25/06/0127/06/01

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