TY - GEN
T1 - Skillfully diminishing antenna effect in layer assignment stage
AU - Lin, Chih Chien
AU - Liu, Wen Hao
AU - Li, Yih-Lang
PY - 2014
Y1 - 2014
N2 - Antenna effect is an important issue that critically impacts the reliability and yield of integrated circuits. The dynamic-programming-based (DP-based) layer assignment method has been adopted to minimize antenna violation by enumerating all possible solutions and pruning inferior solutions. However, the complexities of modern circuits have significantly increased, likely causing the DP-based method to consume much more runtime and memory space. In this paper, we propose a skillful method to effectively Diminish Antenna effect in Layer Assignment Stage (DALAS). Unlike previous work that needs to search for separator locations and thus requires exploring much more solution space, DALAS does not need to search for separator locations and can deal with local and global antenna effects while trying to keep total via count and total overflow minimal. Experiment results show that DALAS is the first work to expel all antenna violations with similar via count to that produced by previous works [3][5] for the benchmarks in ISPD'08 Global Routing Contest.
AB - Antenna effect is an important issue that critically impacts the reliability and yield of integrated circuits. The dynamic-programming-based (DP-based) layer assignment method has been adopted to minimize antenna violation by enumerating all possible solutions and pruning inferior solutions. However, the complexities of modern circuits have significantly increased, likely causing the DP-based method to consume much more runtime and memory space. In this paper, we propose a skillful method to effectively Diminish Antenna effect in Layer Assignment Stage (DALAS). Unlike previous work that needs to search for separator locations and thus requires exploring much more solution space, DALAS does not need to search for separator locations and can deal with local and global antenna effects while trying to keep total via count and total overflow minimal. Experiment results show that DALAS is the first work to expel all antenna violations with similar via count to that produced by previous works [3][5] for the benchmarks in ISPD'08 Global Routing Contest.
UR - http://www.scopus.com/inward/record.url?scp=84903973972&partnerID=8YFLogxK
U2 - 10.1109/VLSI-DAT.2014.6834859
DO - 10.1109/VLSI-DAT.2014.6834859
M3 - Conference contribution
AN - SCOPUS:84903973972
SN - 9781479927760
T3 - Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
BT - Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
PB - IEEE Computer Society
T2 - 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014
Y2 - 28 April 2014 through 30 April 2014
ER -