Simulation of characteristic variation in 16 nm gate FinFET devices due to intrinsic parameter fluctuations

High-κ/metal-gate and vertical channel transistors are well-known solutions to continue the device scaling. This work extensively explores the physics and mechanism of the intrinsic parameter fluctuations in nanoscale fin-type field-effect transistors by using an experimentally validated three-dimensional quantum-corrected device simulation. The dominance fluctuation sources in threshold voltage, gate capacitance and cutoff frequency have been found. The emerging fluctuation source, workfunction fluctuation, shows significant impacts on DC characteristics; however, its impact is reduced in AC characteristics due to the screening effect of the inversion layer. Additionally, the channel discrete dopant may enhance the electric field and therefore make the averaged cutoff frequency of fluctuated devices larger than the nominal value of cutoff frequency.