Self-assessment of an 5S audit in semiconductor manufacturing

Yung-Chia Chang, Chuan Yung Chen*, Kuei Hu Chang

*此作品的通信作者

研究成果: Article同行評審

摘要

The 5S audit is known as troublesome as it evaluates how the 5S practice is implemented on the shopfloor with respect to thousands of continuous improvements. This study applies a novel sustainable benchmarking framework that assists practitioners in understanding their current position and to make continuous improvements with priority on the self-assessment of a 5S audit for a semiconductor fabrication plant (fab). This study applies the novel 5S-Failure Modes and Effects Analysis (5S-FMEA) framework to categorize findings in the 5S audit and subsequently justify the 5S-Risk Priority Number (5S-RPN) for a fab. The self-assessment result for a 5S audit can be transformed from qualitative statement into a quantitative evaluation to examine and prioritize all descriptive failure modes (findings) on a 5S audit. Practitioners can stepwise apply the proposed 5S-FMEA and 5S-RPN to their self-assessment of a 5S audit in a closed-loop Plan-Do-Check-Act (PDCA) cycle. This is the first attempt to evaluate (check) and prioritize (act) descriptive failure modes (findings) of 5S-FMEA using the quantitative approach of the 5S-RPN for semiconductor manufacturing. A case study demonstrates the feasibility and robustness of the proposed model.

原文English
頁(從 - 到)251-263
頁數13
期刊Information Technology Journal
12
發行號2
DOIs
出版狀態Published - 17 一月 2013

指紋

深入研究「Self-assessment of an 5S audit in semiconductor manufacturing」主題。共同形成了獨特的指紋。

引用此