TY - GEN
T1 - Selective area epitaxy of axial wurtzite -InAs nanowire on InGaAs NW by MOCVD
AU - Anandan, Deepak
AU - Chang, Edward Yi
AU - Yu, Hung-Wei
AU - Ko, Hua Lun
AU - Nagarajan, Venkatesan
AU - Singh, Sankalp Kumar
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/4/19
Y1 - 2021/4/19
N2 - Integration of InGaAs/InAs nanowire on silicon (Si) substrate has been attracting huge attention for opto- and micro-electronics applications. In this work we report selective area epitaxy (SAE) of InGaAs/InAs heterostructure (HS) on Si (111) using metal organic chemical vapor deposition (MOCVD). High quality InAs wurtzite (WZ) segment is grown axially on InGaAs NW when the arsine (AsH3) supply is low. The growth phenomenon behind the axial InAs HS on InGaAs is attributed due to surface segregation and sidewall diffusion of indium (In) adatoms on the surface of the InGaAs nanowire at In-rich/arsenic (As)-limited region. For high AsH3 flow, As coverage impedes InAs segment formation.
AB - Integration of InGaAs/InAs nanowire on silicon (Si) substrate has been attracting huge attention for opto- and micro-electronics applications. In this work we report selective area epitaxy (SAE) of InGaAs/InAs heterostructure (HS) on Si (111) using metal organic chemical vapor deposition (MOCVD). High quality InAs wurtzite (WZ) segment is grown axially on InGaAs NW when the arsine (AsH3) supply is low. The growth phenomenon behind the axial InAs HS on InGaAs is attributed due to surface segregation and sidewall diffusion of indium (In) adatoms on the surface of the InGaAs nanowire at In-rich/arsenic (As)-limited region. For high AsH3 flow, As coverage impedes InAs segment formation.
UR - http://www.scopus.com/inward/record.url?scp=85108171688&partnerID=8YFLogxK
U2 - 10.1109/VLSI-TSA51926.2021.9440134
DO - 10.1109/VLSI-TSA51926.2021.9440134
M3 - Conference contribution
AN - SCOPUS:85108171688
T3 - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
BT - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021
Y2 - 19 April 2021 through 22 April 2021
ER -