TY - JOUR
T1 - SCR device with double-triggered technique for on-chip ESD protection in sub-quarter-micron silicided CMOS processes
AU - Ker, Ming-Dou
AU - Hsu, Kuo Chun
PY - 2003/9/1
Y1 - 2003/9/1
N2 - Turn-on efficiency is the main concern for silicon-controlled rectifier (SCR) devices used as on-chip electrostatic discharge (ESD) protection circuit, especially in deep sub-quarter-micron CMOS processes with much thinner gate oxide. A novel double-triggered technique is proposed to speed up the turn-on speed of SCR devices for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide in sub-quarter-micron CMOS processes. From the experimental results, the switching voltage and turn-on time of such double-triggered SCR (DT_SCR) device has been confirmed to be significantly reduced by this double-triggered technique.
AB - Turn-on efficiency is the main concern for silicon-controlled rectifier (SCR) devices used as on-chip electrostatic discharge (ESD) protection circuit, especially in deep sub-quarter-micron CMOS processes with much thinner gate oxide. A novel double-triggered technique is proposed to speed up the turn-on speed of SCR devices for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide in sub-quarter-micron CMOS processes. From the experimental results, the switching voltage and turn-on time of such double-triggered SCR (DT_SCR) device has been confirmed to be significantly reduced by this double-triggered technique.
KW - Double-triggered technique
KW - Electrostatic discharge (ESD)
KW - ESD protection circuit
KW - Silicon-controlled rectifier (SCR)
UR - http://www.scopus.com/inward/record.url?scp=3042562496&partnerID=8YFLogxK
U2 - 10.1109/TDMR.2003.815192
DO - 10.1109/TDMR.2003.815192
M3 - Article
AN - SCOPUS:3042562496
SN - 1530-4388
VL - 3
SP - 58
EP - 68
JO - IEEE Transactions on Device and Materials Reliability
JF - IEEE Transactions on Device and Materials Reliability
IS - 3
ER -