Scan-chain reordering for minimizing scan-shift power based on non-specified test cubes

Yu Ze Wu*, Chia-Tso Chao

*此作品的通信作者

    研究成果: Conference contribution同行評審

    19 引文 斯高帕斯(Scopus)

    摘要

    This paper proposes a scan-cell reordering scheme, named ROBPR, to reduce the signal transitions during test mode while preserving the don 't-care bits in the test patterns for a later optimization. Combined with a pattern-filling technique, the proposed scheme utilizes both response correlation and pattern correlation to simultaneously minimize scan-out and scan-in transitions. A series of experiments demonstrate the effectiveness and superiority of the proposed scheme on reducing total scan-shift transitions. The trade-off between our power-driven scan-cell reordering and a routing-driven scan-cell reordering is discussed based on experiments as well.

    原文English
    主出版物標題Proceedings - 26th IEEE VLSI Test Symposium, VTS08
    頁面147-154
    頁數8
    DOIs
    出版狀態Published - 2 10月 2008
    事件26th IEEE VLSI Test Symposium, VTS08 - San Diego, CA, United States
    持續時間: 27 4月 20081 5月 2008

    出版系列

    名字Proceedings of the IEEE VLSI Test Symposium

    Conference

    Conference26th IEEE VLSI Test Symposium, VTS08
    國家/地區United States
    城市San Diego, CA
    期間27/04/081/05/08

    指紋

    深入研究「Scan-chain reordering for minimizing scan-shift power based on non-specified test cubes」主題。共同形成了獨特的指紋。

    引用此