@inproceedings{da7be801485546738939984be51348b1,
title = "Scalable Fabrication of High-Performance Short-Channel CVD MoS2 MOSFETs with Scaled Dielectric Using a Metal-Bridging Free Approach",
abstract = "In this work, we propose a scalable metal-bridging free (MBF) approach to fabricate an array of short-channel MoS2 transistors on 6-inch Si wafer capped with HfO2 dielectric. The method achieves a remarkable Gm of 75 µS/µm with a gate length of 50nm and Id,sat >200 µA/µm. This process not only addresses the low-throughput issue of conventional e-beam lithography but also demonstrates the feasibility of wafer-scale manufacturing of high-performance 2D material-based devices, paving the way for future low-power electronics.",
author = "Su, \{Yuan Chun\} and Chang, \{Yun Cheng\} and Tsai, \{Jian Chen\} and Su, \{Chun Jung\} and Li, \{Pei Wen\} and Chang, \{Wen Hao\} and Lin, \{Horng Chih\}",
note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 ; Conference date: 21-04-2025 Through 24-04-2025",
year = "2025",
doi = "10.1109/VLSITSA64674.2025.11046650",
language = "English",
series = "2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers",
address = "美國",
}