RLC signal integrity analysis of high-speed global interconnects

X. Huang; Y. Cao; D. Sylvester; S. Lin; T. J. King; Chen-Ming Hu

doi:10.1109/IEDM.2000.904422

RLC signal integrity analysis of high-speed global interconnects

X. Huang^*, Y. Cao, D. Sylvester, S. Lin, T. J. King, Chen-Ming Hu

^*此作品的通信作者

國際半導體產業學院

研究成果: Conference article › 同行評審

35 引文斯高帕斯（Scopus）

摘要

Inductive and capacitive coupling effects for high-speed global interconnects are studied via simulation. The impact of inductive coupling on delay and noise is found to be comparable to capacitive effects in high-speed buses. The results indicate that current-return paths are not strictly bounded by wide VDD/GND lines, so that inductive coupling is only partially eliminated by using shield wires. Shielding strategies for noise- and delay-sensitive nets is proposed, considering worst-case switching patterns.

原文	English
頁（從 - 到）	731-733
頁數	3
期刊	Technical Digest - International Electron Devices Meeting
DOIs	https://doi.org/10.1109/IEDM.2000.904422
出版狀態	Published - 1 12月 2000
事件	2000 IEEE International Electron Devices Meeting - San Francisco, CA, 美國持續時間: 10 12月 2000 → 13 12月 2000

存取文件

10.1109/IEDM.2000.904422

其它文件與鏈接

Link to publication in Scopus

引用此

@article{7028b0e88b2b4d299b93e942dfb72d94,

title = "RLC signal integrity analysis of high-speed global interconnects",

abstract = "Inductive and capacitive coupling effects for high-speed global interconnects are studied via simulation. The impact of inductive coupling on delay and noise is found to be comparable to capacitive effects in high-speed buses. The results indicate that current-return paths are not strictly bounded by wide VDD/GND lines, so that inductive coupling is only partially eliminated by using shield wires. Shielding strategies for noise- and delay-sensitive nets is proposed, considering worst-case switching patterns.",

author = "X. Huang and Y. Cao and D. Sylvester and S. Lin and King, {T. J.} and Chen-Ming Hu",

year = "2000",

month = dec,

day = "1",

doi = "10.1109/IEDM.2000.904422",

language = "English",

pages = "731--733",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2000 IEEE International Electron Devices Meeting ; Conference date: 10-12-2000 Through 13-12-2000",

}

TY - JOUR

T1 - RLC signal integrity analysis of high-speed global interconnects

AU - Huang, X.

AU - Cao, Y.

AU - Sylvester, D.

AU - Lin, S.

AU - King, T. J.

AU - Hu, Chen-Ming

PY - 2000/12/1

Y1 - 2000/12/1

N2 - Inductive and capacitive coupling effects for high-speed global interconnects are studied via simulation. The impact of inductive coupling on delay and noise is found to be comparable to capacitive effects in high-speed buses. The results indicate that current-return paths are not strictly bounded by wide VDD/GND lines, so that inductive coupling is only partially eliminated by using shield wires. Shielding strategies for noise- and delay-sensitive nets is proposed, considering worst-case switching patterns.

AB - Inductive and capacitive coupling effects for high-speed global interconnects are studied via simulation. The impact of inductive coupling on delay and noise is found to be comparable to capacitive effects in high-speed buses. The results indicate that current-return paths are not strictly bounded by wide VDD/GND lines, so that inductive coupling is only partially eliminated by using shield wires. Shielding strategies for noise- and delay-sensitive nets is proposed, considering worst-case switching patterns.

UR - http://www.scopus.com/inward/record.url?scp=0034453548&partnerID=8YFLogxK

U2 - 10.1109/IEDM.2000.904422

DO - 10.1109/IEDM.2000.904422

M3 - Conference article

AN - SCOPUS:0034453548

SN - 0163-1918

SP - 731

EP - 733

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - 2000 IEEE International Electron Devices Meeting

Y2 - 10 December 2000 through 13 December 2000

ER -

RLC signal integrity analysis of high-speed global interconnects

摘要

存取文件

其它文件與鏈接

指紋

引用此