Ring-VCO based low noise and low spur frequency synthesizer

Te Wen Liao, Jun Ren Su, Chung-Chih Hung

研究成果: Conference contribution同行評審

3 引文 斯高帕斯(Scopus)

摘要

This paper presents a low phase-noise phase locked loop (PLL) system with a Multi-Phase Over-Sampling Charge Pump (MPOSCP) for wireless applications. The low phase-noise frequency synthesizer reduces ripples and noise on the control voltage of the ring voltage-controlled oscillator (VCO) as a means to control in-band noise at the output of the PLL. An MPOSCP is proposed to perform multi-phase over-sampling control for the charge pump (CP) in locked state. The proposed frequency synthesizer was fabricated using the TSMC 90-nm CMOS process. The prototype occupies 0.046mm2 active area, the reference frequency is 27 MHz, and the output frequency is 432 MHz with the total power consumption of 7 mW. The PLL achieved phase noise below -100 dBc/Hz from 15 Hz to 100 kHz with the reference spurs below-48 dBc.

原文English
主出版物標題2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
頁面1861-1864
頁數4
DOIs
出版狀態Published - 9 9月 2013
事件2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
持續時間: 19 5月 201323 5月 2013

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Conference

Conference2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
國家/地區China
城市Beijing
期間19/05/1323/05/13

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