Reliability of p-Type Pi-Gate Poly-Si Nanowire Channel Junctionless Accumulation-Mode FETs

In this study, p-type Pi-gate (PG) poly-Si nanowire channel junctionless accumulation-mode (JAM) field-effect transistors (FETs) were successfully fabricated and their reliability was investigated. The reliability of these PG JAM FETs was found to be dependent on the effective channel doping concentration ( ${N}_{\text {ch,eff}}$ ). Through a negative gate bias stress (NGBS) test, we found that degradation in the average subthreshold swing (A.S.S.) and shift in the threshold voltage ( ${V}_{\text {TH}}$ ) increases as the ${N}_{\text {ch,eff}}$ of the PG JAM FETs decreases. Furthermore, the PG JAM FETs with a lower ${N}_{\text {ch,eff}}$ show the more severe rate of deterioration in the transconductance ( ${G}_{\text {m}}$ ) and ON current ( ${I}_{\text {ON}}$ ). By increasing ${N}_{\text {ch,eff}}$ to reduce the electric field ( ${E}$ -field) on the gate oxide and tune the carrier transport mechanism in the poly-Si nanowire channel, a better immunity against the NGBS test in the p-type PG JAM FETs can be achieved under a gate overdrive voltage ( ${V}_{\text {GOD}} = {V}_{G}$ - ${V}_{\text {TH},\text {initial}} = -{3.5}$ V) to perform the NGBS test.