Reliability and device scaling challenges of trapping charge flash memories

C. C. Yeh; W. J. Tsai; T. C. Lu; Y. Y. Liao; N. K. Zous; H. Y. Chen; Ta-Hui Wang; Wenchi Ting; Joseph Ku; Chih Yuan Lu

doi:10.1109/IPFA.2004.1345612

Reliability and device scaling challenges of trapping charge flash memories

C. C. Yeh^*, W. J. Tsai, T. C. Lu, Y. Y. Liao, N. K. Zous, H. Y. Chen, Ta-Hui Wang, Wenchi Ting, Joseph Ku, Chih Yuan Lu

^*此作品的通信作者

研究成果 › 同行評審

6 引文斯高帕斯（Scopus）

摘要

As flash memories move toward giga-bits era, several challenges limit their scalability. Floating gate flash memories face the problems of un-scalable tunnel oxide, and the last technology node of NOR Flash was predicted to be 65nm, based on the extrapolation of the difference between physical and electrical cell dimensions vs. generations, which drops to zero at 45nm. Although SONOS-type flash memories show better scalability and simpler process, there are still some difficulties. In this paper, three SONOS-type flash memories (SONOS, NROM and PHINES) are compared and the scaling problems and reliability issues are disclosed.

原文	English
頁面	247-250
頁數	4
DOIs	https://doi.org/10.1109/IPFA.2004.1345612
出版狀態	Published - 7月 2004
事件	Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004 - , 台灣持續時間: 5 7月 2004 → 8 7月 2004

Conference

Conference	Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004
國家/地區	台灣
期間	5/07/04 → 8/07/04

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10.1109/IPFA.2004.1345612

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Yeh, C. C., Tsai, W. J., Lu, T. C., Liao, Y. Y., Zous, N. K., Chen, H. Y., Wang, T.-H., Ting, W., Ku, J., & Lu, C. Y. (2004). Reliability and device scaling challenges of trapping charge flash memories. 247-250. 論文發表於 Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004, 台灣. https://doi.org/10.1109/IPFA.2004.1345612

@conference{e690c47a5b3340b492bca8bd0ed696b8,

title = "Reliability and device scaling challenges of trapping charge flash memories",

abstract = "As flash memories move toward giga-bits era, several challenges limit their scalability. Floating gate flash memories face the problems of un-scalable tunnel oxide, and the last technology node of NOR Flash was predicted to be 65nm, based on the extrapolation of the difference between physical and electrical cell dimensions vs. generations, which drops to zero at 45nm. Although SONOS-type flash memories show better scalability and simpler process, there are still some difficulties. In this paper, three SONOS-type flash memories (SONOS, NROM and PHINES) are compared and the scaling problems and reliability issues are disclosed.",

author = "Yeh, {C. C.} and Tsai, {W. J.} and Lu, {T. C.} and Liao, {Y. Y.} and Zous, {N. K.} and Chen, {H. Y.} and Ta-Hui Wang and Wenchi Ting and Joseph Ku and Lu, {Chih Yuan}",

year = "2004",

month = jul,

doi = "10.1109/IPFA.2004.1345612",

language = "English",

pages = "247--250",

note = "Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004 ; Conference date: 05-07-2004 Through 08-07-2004",

}

Yeh, CC, Tsai, WJ, Lu, TC, Liao, YY, Zous, NK, Chen, HY, Wang, T-H, Ting, W, Ku, J & Lu, CY 2004, 'Reliability and device scaling challenges of trapping charge flash memories', 論文發表於 Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004, 台灣, 5/07/04 - 8/07/04 頁 247-250. https://doi.org/10.1109/IPFA.2004.1345612

TY - CONF

T1 - Reliability and device scaling challenges of trapping charge flash memories

AU - Yeh, C. C.

AU - Tsai, W. J.

AU - Lu, T. C.

AU - Liao, Y. Y.

AU - Zous, N. K.

AU - Chen, H. Y.

AU - Wang, Ta-Hui

AU - Ting, Wenchi

AU - Ku, Joseph

AU - Lu, Chih Yuan

PY - 2004/7

Y1 - 2004/7

N2 - As flash memories move toward giga-bits era, several challenges limit their scalability. Floating gate flash memories face the problems of un-scalable tunnel oxide, and the last technology node of NOR Flash was predicted to be 65nm, based on the extrapolation of the difference between physical and electrical cell dimensions vs. generations, which drops to zero at 45nm. Although SONOS-type flash memories show better scalability and simpler process, there are still some difficulties. In this paper, three SONOS-type flash memories (SONOS, NROM and PHINES) are compared and the scaling problems and reliability issues are disclosed.

AB - As flash memories move toward giga-bits era, several challenges limit their scalability. Floating gate flash memories face the problems of un-scalable tunnel oxide, and the last technology node of NOR Flash was predicted to be 65nm, based on the extrapolation of the difference between physical and electrical cell dimensions vs. generations, which drops to zero at 45nm. Although SONOS-type flash memories show better scalability and simpler process, there are still some difficulties. In this paper, three SONOS-type flash memories (SONOS, NROM and PHINES) are compared and the scaling problems and reliability issues are disclosed.

UR - http://www.scopus.com/inward/record.url?scp=20044392475&partnerID=8YFLogxK

U2 - 10.1109/IPFA.2004.1345612

DO - 10.1109/IPFA.2004.1345612

M3 - Paper

AN - SCOPUS:20044392475

SP - 247

EP - 250

T2 - Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004

Y2 - 5 July 2004 through 8 July 2004

ER -

Reliability and device scaling challenges of trapping charge flash memories

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