TY - GEN
T1 - Reinforcement Learning-Based Read Performance Throttling to Enhance Lifetime of 3D NAND SSD
AU - Liaw, Yong Cheng
AU - Chen, Shuo Han
AU - Liang, Yu Pei
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - With high storage density and low cost per bit, 3D NAND flash has dominated the market of modern solid-state drives (SSDs). Nevertheless, the growing number of stacked layers and the evolving multi-bits-per-cell technology of 3D NAND flash have led to the issue of fast accumulated read disturbance. Read disturbance leads to data bit errors and requires the error correction code (ECC) scheme to remove bit errors to correct data retrieval during read operations. Nevertheless, owing to the process of read retry and reference voltage adjustment of the ECC scheme, the read performance of 3D NAND flash deteriorates as the number of error bits grows. To mitigate the unwanted impact of prolonged read latency and maintain top read performance, modern SSDs actively rewrite stored data to remove error bits when the read latency becomes higher. However, actively removing data bit errors through data rewrites could wear out the SSDs prematurely and ultimately consume the whole lifetime of SSDs. To resolve such concerns, this paper proposes lowering the number of data rewrites through throttling the read performance of 3D NAND flash-based SSDs via reinforcement learning techniques to adaptively meet the performance requirements of different applications. Trace-driven experiments have shown promising results.
AB - With high storage density and low cost per bit, 3D NAND flash has dominated the market of modern solid-state drives (SSDs). Nevertheless, the growing number of stacked layers and the evolving multi-bits-per-cell technology of 3D NAND flash have led to the issue of fast accumulated read disturbance. Read disturbance leads to data bit errors and requires the error correction code (ECC) scheme to remove bit errors to correct data retrieval during read operations. Nevertheless, owing to the process of read retry and reference voltage adjustment of the ECC scheme, the read performance of 3D NAND flash deteriorates as the number of error bits grows. To mitigate the unwanted impact of prolonged read latency and maintain top read performance, modern SSDs actively rewrite stored data to remove error bits when the read latency becomes higher. However, actively removing data bit errors through data rewrites could wear out the SSDs prematurely and ultimately consume the whole lifetime of SSDs. To resolve such concerns, this paper proposes lowering the number of data rewrites through throttling the read performance of 3D NAND flash-based SSDs via reinforcement learning techniques to adaptively meet the performance requirements of different applications. Trace-driven experiments have shown promising results.
KW - 3D NAND flash
KW - read performance
KW - reinforcement learning
KW - SSD
UR - http://www.scopus.com/inward/record.url?scp=85207088849&partnerID=8YFLogxK
U2 - 10.1109/NVMSA63038.2024.10693665
DO - 10.1109/NVMSA63038.2024.10693665
M3 - Conference contribution
AN - SCOPUS:85207088849
T3 - Proceedings - 2024 13th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2024
BT - Proceedings - 2024 13th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2024
Y2 - 21 August 2024 through 23 August 2024
ER -