REGAL: Reprogrammable Engines for Genome Analysis on LPDDR4x-based Stacked DRAM

Aman Sinha, Yuhao Fang, Bo Cheng Lai

研究成果: Conference contribution同行評審

摘要

Genomic big data analysis pipelines are bottlenecked with massive data movement between CPU and memory hierarchy. Recently developed Stacked Embedded DRAM (SEDRAM) with high density hybrid bonding offers not only high bandwidth concurrent data accesses, but also highly parallel distributed data processing on the logic layer. However, the complex logical flow and data dependencies pose challenges to existing Near-DRAM Processing (NDP) solutions for analysis such as string pattern matching using FM-Index. In this work, we propose REGAL, a highly scalable and re-programmable solution on SEDRAM memory system. REGAL architecture maximizes intra-query parallelism and enhances occupancy of all components. The efficient data layout and mapping minimizes round-trip communications between processing engines. The programmability of REGAL further enables effective prefetching to support variations in data characteristics and involved algorithms. REGAL demonstrates up-to 17.3x and 70.6x speedup and energy reductions compared to multithreaded CPU implementation for FM-Index queries, while achieving performance comparable to state-of-the-art fixed-function NDP implementation.

原文English
主出版物標題ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665451093
DOIs
出版狀態Published - 2023
事件56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 - Monterey, United States
持續時間: 21 5月 202325 5月 2023

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2023-May
ISSN(列印)0271-4310

Conference

Conference56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
國家/地區United States
城市Monterey
期間21/05/2325/05/23

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